This invention relates to integrated circuits, and more particularly, to memory elements in integrated circuits.
Integrated circuits often contain memory elements. Memory elements may be based on cross-coupled inverters and may be used to store data. Each memory element may store a single bit of data.
Memory elements are often arranged in arrays. In a typical array, data lines are used to write data into the memory elements and are used to read data from memory elements that have been loaded with data. Address lines may be used to select which of the memory elements are being accessed. In some arrangements, clear lines are used to clear the memory elements.
In modern integrated circuit designs, care must be taken to design memory element cells so that they consume relatively small amounts of circuit real estate. This can be difficult using conventional memory cell transistor designs based on n-channel metal-oxide-semiconductor clear transistors. Although such conventional designs may operate satisfactorily, layout considerations may make it difficult or impossible to minimize the amount of circuit area consumed by each memory cell as much as desired. Conventional memory element designs may also make it difficult to shrink the size of circuit components such as programmable multiplexers.
It would therefore be desirable to provide improved ways in which to form memory elements and programmable structures such as multiplexers on integrated circuits.